1. Field of Invention
The present invention relates to a chip package with asymmetric molding, and particularly to a chip package with a lead frame.
2. Description of the Related Art
For a dynamic random access memory (DRAM), the packaging method can be categorized into small outline J-lead (SOJ) package and thin small outline package (TSOP), both of which has the advantage of fast transmission rate, good heat dispersion and compact size. In terms of lead frames, the SOJ package and the TSOP can further be classified into lead on chip (LOC) package, U.S. Pat. No. 4,862,245, and chip on lead (COL) package, U.S. Pat. No. 4,989,068.
FIG. 1A is a schematic cross-sectional view of a conventional thin small outline package TSOP having lead on chip (LOC) configuration. Referring to FIG. 1A, a conventional thin small outline package (TSOP) 100a includes a lead frame 110, a chip 120, an adhesive layer 130, first bonding wires 140a and an encapsulant 150, wherein the lead frame 110 has inner lead portions 112 and outer lead portions 114. The chip 120 is fixed on the Lower surfaces of inner lead portions through the adhesive layer 130 between the chip 120 and the inner lead portion 112. The first bonding wires 140a are electrically connected between the chip 120 and the corresponding inner lead portions 112, respectively. The encapsulant 150 is used for encapsulating the inner lead portions 112, the chip 120, the adhesive layer 130 and the first bonding wires 140a. 
Note that the thickness D1 of the encapsulant 150 over the outer lead portions 114 is 1:3 in proportion to the thickness D2 of the encapsulant 150 under the outer lead portions 114. Therefore, as the encapsulant 150 condenses and shrinks, the TSOP 100a can be damage due to the warpage.
FIG. 1B is a schematic cross-sectional view of another conventional thin small outline package (TSOP) with lead on chip (LOC) configuration. FIG. 1B is similar to FIG. 1A. The difference in FIG. 1B is the conventional TSOP 100b herein further includes second bonding wires 140b and the lead frame 110 further includes bus bars 116, which are adjacent to the inner lead portions 112. In addition, the second bonding wires 140b are electrically connected between the bus bars 116 and the chip 120. However, the conventional TSOP 100b still has the above-described problems.